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Master the fundamental concepts of protected mode transition through this focused micro-challenge.
x86_64 requires protected mode with paging enabled, then activation of PAE and an LM-compatible page table before setting EFER.LME and far jumping to 64-bit code. For example, after MOV EAX, CR4; OR EAX, 0x20 enables PAE, CR3 must reference PML4 tables mapping your kernel.
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IRETQ)The first far jump after enabling LME may land in compatibility mode if the segment is a 32-bit code descriptor; a second far jump with a 64-bit CS clears compatibility state. Ensure PAE page tables include the high-half addresses if the kernel links above 2 GB. IRETQ is required for interrupts once running in true 64-bit mode.
You will extend paging to PAE/PML4, set EFER.LME, and jump to 64-bit code. This exercise requires PAE on before LME and a valid long-mode GDT entry for the far jump target.
Simulate the transition to x86_64 long mode in C.
Requirements:
Test:
Three hints are available for this task, revealed one at a time inside the code workspace so you can struggle productively before seeing them.
Every task includes starter code, theory, and hidden tests so you can implement and verify locally in the browser.
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